how to improve SNR in ADC?

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DDavid

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SNR Improve

Hi,

I am new in analog, (I am RF ENG).
I suppose to improve SNR in A/D
A/D have 16 bit
Like i know from RF that SNR is function of NF.
if i will reduce NF so SNR out will be better!!!
I work with OP amplifier, up to 30MHz.

So my way of action is to put the first stage (op amp) very low noise
Input noise voltage around 1nv/rootHz
Can you guys give me so tips do I correct or ...
please help me!!!

David
 

Re: SNR Improve

The amplifiers before the ADC should be very low noise. Then have the gain high enough so that the amplified noise dithers the ADC by a few counts. That way the ADC does not reduce the system SNR very much.
 

Re: SNR Improve

Hi

Thx for the replying!
Just to understand what u saying:
I have a few stages before A/D
What I thought that first stage suppose to be low noise,
you saying that last stage (before A/D) suppose to be low noise
CORRECT?!?!?!?!?
 

Re: SNR Improve

All stages before the ADC should be low noise, the first one is the most important including high gain. You can do hand calculations to find the equivalent input noise of the string.
 

Re: SNR Improve

Hi

Okay so this like in RF first stage is LNA( low noise high gain (G around 10 - 15 dB)

I try to simulate and saw that if I choose first stage low noise but the second stage produce a lot of noise and voltage noise at the output (of the second amp) very large
for example:
first stage (THS4022) around 5nv
second stage (AD8139) 120nv

intersting that the same second stage (AD8139) stand alone without first produce the same noise at the output like the two stages!??!?!

I saw in one of the papers that they suggested to put two resistors (one series the second to gnd) R1=R2, so the voltage is the divide vy 2 but also noise !!!

David
 

Re: SNR Improve

It looks like your second stage is dominating the total noise. Try having the second stage the same as the first.

Another thing to consider is the noise from the resistors. They should be low value, but not so low as to overload the amp output current limits.
 

Re: SNR Improve

For the first stage:
Rg=50
Rf=250

Vnr=sqrt(4piR)

Second stage is
Rg=274
Rf=274
or
Rf=274*2

I will try to simulate that second stage will be as first!!!
 

Re: SNR Improve

Another thing I tried to put resistor divider at the input of the A/D
divider by 2 suppose to divide by 2 the voltage so signal suppose reduce by 6dBm
and noise floor by the same value!

What I saw that:
Sbefore =-46dBm
S after = -59.5dBm

Nbefore=-106
Nafter= -111

Noise reduce by approximately 6dB but the signal much more!!!

WHY?????
 

Re: SNR Improve

Did you take into account the input impedance of the ADC? You should not divide the signal down with resistors. The gain ahead of the ADC should be as large as possible without clipping on the maximum expected input signal.
 

Re: SNR Improve

Regardig the A/D resistor matching I beleive I matched it correctly!
Regarding the Total Gain I have about 20dB total gain till A/D.
If I will increased gain so the noise level will increse also!!!
So what the limit
Vin (of the system) is 50mV
A/D suppose to receive up to 3.2vp-p
Also I have in chain VGA (variable Gain Amp) : gain can be changed from 0 to 35db!
 

Re: SNR Improve

Which Cad are proper to simulate Noise parameters such as SNR etc

David
 

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