How to implement a pulse LOS detection circuit

[chang830]

Hi,
I need a pulse Los detection circuit, but I don't know how to implement it.

The requirement is the block can give the alarm signal when no pulse(or rise edge) is found in given time.

Anyone pls. shed some light on it?

Thanks in advance

 

[echo47]

Pulse los detection

I assume LOS means Loss of Signal.

One way to do that -- design an up-counter that increments continuously, but resets to zero whenever an input pulse occurs. If the count reaches your desired timeout value, then stop counting and trigger the alarm.

 

[chang830]

Re: Pulse los detection

I assume LOS means Loss of Signal.

One way to do that -- design an up-counter that increments continuously, but resets to zero whenever a pulse is detected. If the count reaches your desired timeout value, then stop counting and trigger the alarm.

Hi echo47,
Thanks for your reply.

The difficulty here is there is no clock signal in my block. So, the counter can not be used.

I heared the monostabillity trigger circuit can implement it. But I don't know how to implement it.

Pls. help me.

Thanks

 

[echo47]

Pulse los detection

What type of FPGA/CPLD/PLD are you using? It may be possible to implement a simple oscillator, or add an external RC time constant.

How long is your required timeout? How accurate does it need to be?

Or are you simply writing an HDL testbench, so you don't need real hardware?

 

[IanP]

Re: Pulse los detection

Not all monostable can be re-triggered ..
One example of those which can is the 74123 ..
The time can be set by RC and every incomming pulse that comes within this time will re-trigger the circuit ..
If there is no pulse the output will jump from "1" to "0" or from "0" to "1" depending on which output you choose ..
Should't be difficult to build ..

Regards,
IanP