How to have HSPICE ignore open drain/source MOSFETs?

[timyu1477]

I am new to this board. I am wondering if someone knows how to have HSPICE ignore any MOSFET with open drain/source ( only 1 connection to the node). It seems open drain/source causes majority of convergence problems. Help or comments are appreciated.
All those open drain/soure MOSFET are extra devices in design, reserved for future circuit changes.

 

[flatulent]

Attach a large value resistor between the node an ground. 1MEGohm for example.

 

[bastos4321]

Use

.options GSHUNT=1e-12

This will put a condutance of value GSHUNT in evry node to 0.

"Conductance added from each node to ground. The
default value is zero. Adding a small GSHUNT to each
node can solve some “internal timestep too small”
problems caused by high frequency oscillations or by
numerical noise. "

Bastos

 

[flyinspace]

Hi Bastos,
I am wondering if the option "GSHUNT=1e-12" can affect the accuracy of the simulation, especially the high speed cirucit.
Thanks

 

[timyu1477]

I am almost going to write some script to comment out each one of those open drain/soure MOSFET. I think besides some capacitance concern, those devices do not affect circuit performance. It may be tricky to write the script though.

 

[tecsiun]

All those open drain/soure MOSFET are usefull, if not, how can not set them NG?

 

[timyu1477]

to tecsiun
What is NG? In my case, all those open drain/source in design are just backup devices. They are there in case of future revision such as changing the current mirror ratio, inserting offset etc. They are, in general tends to case covergense issue in HSPICE. So, if there is any option to comment out those devices, it will be helpful.

 

[yeechyan]

Do you mean that those open source/drain transistors are not in use in the circuit? Try ground all the terminals of the transistor if they're not currently in use in the circuit.

 

[Hughes]

In schematic view, you can easily remove those transistors for simulation. For layout, a mark layer can be used to prevent those transistors being extracted by LPE tools.

 

[jordan76]

Why not connect open drain/source to ground since they are used for design revision?

regards,
jordan76