How to fix instability caused by ground bondwire on chip for my amplifier design

lara32

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Hello,

I am designing an LNA in the 4-8GHz range in Cadence. When I model my schematic with a direct path to ground, it is completely stable (I am checking the k-factor). However, when I add even 1 nH inductance to model an inductor, the circuit becomes unstable. Does anyone have any ideas on how I can mitigate this?
I know that in practice, typically many bondwires are used to reduce the inductance but this has proven to not be enough to fix the stability issues. Any advice would be greatly appreciated
 

If it's possible, a small series resistor to Source OR Gate might improve the stability.
A Negative Feedback might also reduce oscillation probability by expense of an amount of Gain.
You should know where this instability comes from. Input Side or Output Side.In order to get this information, you have to draw Stability Circles
 

What process the LNA is? GaAs, CMOS, SiGe, etc.?
What topology the LNA is? Common source, cascode, differential, etc.?
 

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