How to find the subthreshold of the process that you are using?

Dera all,

I am designing a ultra-low power bandgap. I need to know the subthreshold slope parameter for my process. I am using the topology presented in this paper "A Sub-1-V, 10 ppm/degrees, Nanopower Voltage Reference Generator", Guiseppe De Vita, 2007 JSSC.

In this paper, the subthreshold slope parameter is denoted as 'm'. However, I can't find anything similar to in PDK model parameters. Also, the PDK I'm using is 130nm Globalfoundries Generic/RF process.

Any help is appreciated,

Thank you very much,

winfangwill

Subthreshold slope (from a model) is an outcome, not
an input. It tends to follow NSS (number of surface
states) in older models, I do notknow what in BSMIx.y
takes the place of that (but I'm sure the Fine Manual
would tell you).

All you need to do is set up a measurment simulation
with Vdd=Vds(max)-VT, Vgg=0 (gnd!), and apply two
different gate voltages (both of them lower than VT),
pick off the current for each, and the subSlope (mV/dec)
is (Vgs2-Vgs1)/(log10(Ids2)-log10(Ids1)).

Now, subthreshold slope is very dependent on details
of processing (interface qualities) and yet seldom is
a WAT acceptance parameter or even a measured
quantity. But it doesn't hurt to dig into a WAT report
and data set one time, to see what you may have
been provided.

Don't know if this is helpful, because it's from a 180nm process: View attachment Tradeoffs_and_optimization_in_analog_cmos_design_by_David_Binkley_p49.pdf

The substrate factor n for subthreshold operation (in weak to deep weak inversion region) should lie between 1.35 and 1.3 .

Your subthreshold slope parameter is m = ln 10 * n * U_T ≈ 2.3*1.35*25.9 ≈ 80 mV/decade at room temperature. That's about the result which the measurement simulation suggested by dick_freebird should show.