hello every one!!, my question actually is how can we find the difference between the count values
for eg i have a count that counts from 1 to 16 ,so 1,2,3,4,5,6,7,8,9 and so on, now i need to find the difference between the second count and first count , and third count and secnd count , and fourth count and third countand so on , so my diff_count signal will be like this 1,1,1,1, ( since 2-1=1,,3-2=1,,4-3=1,, and so on ) and it keeps repeating.
here is my general counter code
Code VHDL - [expand] |
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| library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_arith.ALL;
use IEEE.STD_LOGIC_unsigned.ALL;
entity up is
port ( clk: in std_logic;
reset: in std_logic;
count: out std_logic_vector(4 downto 0)
);
end up;
architecture Behavioral of up is
signal a : std_logic_vector(4 downto 0);
begin
count <=a;
process(clk,reset)
begin
if(clk'event and clk='1') then
if(reset ='1') then
a <= (others=>'0');
else
a<= a + 1;
end if;
end if;
end process;
end Behavioral; |