how to find switching losses in LTSpice

[Praveen_Raj]

I'm trying compare the efficiency of an inverter (power R1 / input Power) at different switching frequencies to understand switching losses, but im getting the same efficiency of 95.4% when Fs = 10 and Fs= 100k.
I'm using Mosfets with Vds = 600V

Can someone please help me understand why this is happening....

 

[FvM]

You are operating AOD280A60 far above useful current range and get mainly conduction losses.

--- Updated Sunday at 8:08 AM ---

For realistic switching simulation, you also need to set feasible gate drive conditions.

 

[Praveen_Raj]

You are operating AOD280A60 far above useful current range and get mainly conduction losses.

--- Updated Sunday at 8:08 AM ---

For realistic switching simulation, you also need to set feasible gate drive conditions.

I have made it such tha Id only goes upto 9A as per datasheet,
now for switching freq of 10hz im getting an efficiency 99.49 and of and 100khz im getting an efficiency of 99.42

and if u dont mind could you tell me what are the feasible gate drive conditions would be.
thank you

 

[cupoftea]

Sorry but its not really possible in LTspice to get switching losses accurately. The MOSFET junction capacitances are not modelled properly over the voltage range. Also, the stray inductances in the drive circuit, etc, are not modelled realistically.

 

[FvM]

Sorry but its not really possible in LTspice to get switching losses accurately. The MOSFET junction capacitances are not modelled properly over the voltage range. Also, the stray inductances in the drive circuit, etc, are not modelled realistically.

Don't agree. It completely depends on model quality. Some vendor models have accurate junction capacitance and also package inductance.

 

[Praveen_Raj]

If im not wrong, im getting...
power dissipated by mosfet without llc at low freq in mW
power dissipated by mosfet without llc at high freq in W

power dissipated by mosfet with llc at high freq (resonant freq) in mW
(the above checks out)
and some how im getting lower power with llc at freq higher than resonant freq

 

[mtwieg]

If you post your .asc file (and any required symbol/library files) we can probably help a lot faster.

--- Updated Monday at 1:54 PM ---

Sorry but its not really possible in LTspice to get switching losses accurately. The MOSFET junction capacitances are not modelled properly over the voltage range. Also, the stray inductances in the drive circuit, etc, are not modelled realistically.

There are a lot of reasons simulated losses might be inaccurate, but usually manufacturer models do a very good job of replicating device capacitance. At least that's what I've seen from Vishay, Infineon, and STM. Not sure about AO, but would expect the same.

 

[Praveen_Raj]

Ah yess, sorry

Apparently i can't upload straight .asc file, so imma upload em in a compressed folder

 

[Praveen_Raj]

can someone please suggest me what to do, or who to ask, like this might not seem much, but it's a part of my final year project, i need to get this thing done asap

 

[dick_freebird]

"Wallplug" efficiency is easy. Two frequencies, same load on same power train. The difference is all in the switching.

In figuring efficiency terms I think it's cleaner to work with the loss terms (inefficiencies) that are its elements. There might be competing mechanisms that obscure "what to improve" if you look only at the bottom line, converter-level Pout/Pin.