Normal simulation could not find the offset voltage of the opamp, since all of the components are matched perfectly. To simulate the offset, statisticfal analysis such as Monte Carlo analysis must performed to generate random mismatches to all transistors to simulate the standard deviations of the offset.
By simulation you can find offset introduced by yourself because of your carelessness. Or introduced by different operating points of transistor. It is so called systematic offset. Another offset source is mismatch of OP AMP differential pair (random offset). The rest of transistors mismatch not so important, because it is attenuated by gain of first stage. To estimate this mismatch you can use the following expression (Razavi CMOS analog IC) DeltaVth = 0.1*tox/sqrt(W*L),
where tox - gate oxide thickness in um, W-transistor width, L - transistor lenth both in um. You can introduce random offset as vdc connected to one of the input of OP AMP vith DC value equal to Voffset. Than connect output to negative input (OP AMP will operate as follower). Run Voffset parametric analysis with Voffset change from -DeltaVth to +DeltaVth. Voltage difference between two OP AMP inputs will be OP AMP offset that will include both systematic and random offset.
I think you can calculate an approximate offset value of a simple differential pair base on your model or test result, or you can think there is 10mV offset in a differential pair in the worst case. And you can add these offset DC source in you schematic, you do the DC sweep , and you can see the output offset, divided DC gain , you can gain the approximate input refered offset. I am sorry that my English is very poor , I hope you can understand.