mr_vasanth
Member level 5
- Joined
- Mar 12, 2007
- Messages
- 86
- Helped
- 5
- Reputation
- 10
- Reaction score
- 7
- Trophy points
- 1,288
- Location
- Bangalore, India, India
- Activity points
- 1,906
How to find out a number is odd or even without using "if based check" in verilog or VHDL language ?