how to find FIR filter parameter

Hi

I have to design a FIR filter that can pass the signal from 0 to 10MHz

and the sampling rate is 50MHz

how can i find the cut off frequency to design a filter that suites the entire range


regards

I think you've already stated your cutoff frequency: 10 MHz. There, I found it.

That's not quite enough information to define your filter,though. Things like rolloff, number of taps, passband ripple, response shape, etc. are required.

You could have done a google search, just like real engineers do, and found tons and tons of stuff like this:
https://en.wikipedia.org/wiki/Finite_impulse_response

and this:

https://www.google.com/url?sa=t&rct...8yUrtjwx9KoX1QFHQ&sig2=R6Rz0X0SCAkztTPqxrvyqg

There are lots of free software packages out there that will calculate your coefficients for you. Just search...

hi
the problem i m facing is this that the rectangular input changes in to sinc output as expected

want to know the steps to follow how can i converse the shape of my input signal

regrds

Hi,

It's not cleR to me what you really need.

Using the fir filter as anti aliasing filter? Then you will have problems with your given frequencies. Additionalky you need external analog filtering.

Or you want to form a square input with frequenyc range of 0...10MHz into sine. Here a simple fir filter won't work, because you need to pass the fundamental frequency and cut off all overtones (beginning with 3 x fundamental). Here you need adaptive filter adjustment...

Klaus

An ideal lowpass filter (zero transition band) has a sinc() impulse response according to theory. If you want a different impulse response, you'll chose a different (more smooth) filter characteristic.

One possible approach is to chose a time-continuous filter characteristic with known behaviour (Bessel, Butterworth, Chebyshev) and use it's FIR approximation. Matlab or Octave or useful tools to evaluate filter behaviour.

I have to design a filter that takes the input from the ADC sampling at 50 MHz/10 bit resolution

the input to the ADC is always a square wave with ON time ranging from 100ns to CW.

keeping this spec in view what I supposed that 100ns ON time of the pulse describes the cut off frequency as if a pulse retains for 100ns and as worst case repeats after 100ns the frequency of the pulse is 5MHz so the cut off ( Am I right to do so????)

Now coming to the second problem when I pass the input digitzed data through a 40 tap LP filter (FIR, equiripple) two things happen

1- the ON time of the pulse is seemed to be decreased and
2- when I stem the data (matlab) at the beginning and end of the pulse there are sufficient unwanted points that may destroy rest of the calculation ( for which filter output serve as input)

so what I want is that the input square pulse should retain its shape

I have used stages of filter but it dint work

any help please??

To retain the square shape exactly, you must not apply any filter.

Hi,

For sure a square signal with 100ns low and 100ns high is called 5MHz.

But with fourier analysis you will see that this signal consists of several sine frequencies:
5MHz, 15MHz, 25MHz, 35MHz and so on.... with decreasing amplitude.

If you now run the square signal through a filter with 5MHz cutoff frequency it will loose the sharp edges and - depending on filter characteristic - it will be more like a sine.

Every lowpass filtering will decrease dU/dt. I think this is unavoidable.
*****
So now i can't give you a solution. Maybe you describe more detailed what the goal of all that is.

*****
Btw. With unfiltered (without anti aliasing filter) converted signals you loose some information.
For example if you sample your 5MHz square wave you allways have an uncertainty of 20ns. Means it is not possible to precisely detect if pulsewidth is 90 or 110ns.
Maybe a timing measurement with an approptiate solution is an alternative to the ADC. Or other alternatives...

Klaus

Thanks KlausST for ur detailed reply

what i actually require is that when the input signal is digitized it deviates from its expected value ( may be due to environmental, PCB and other noises )

Suppose ant any xV the ADC is required to give digital level = y

what i rx is y+50 ie the the signal that was required to give 1 digital out ideally spans over 100 digital level

what i want is to squeeze the span to 5 digital levels at the most retaining the pulse level

I hope i am able to explain

regards

It's very unlikely that you can remove the observed level of noise or interferences by a simple low-pass filter, apart from the problem that your bandwidth requirements apparently don't allow a filter.

As a first step, you should analyse the nature and source of interfering signals to find out how it can be removed. Secondly consider if the relevant parameters of the wanted signal can be extracted with less bandwidth. This would be the case e.g. for a periodical signal.

Hi,

Maybe what you need is called "correlation". Simply said it is comparing an input signal waveform with a known waveform.

Read about it.

Klaus

unfortunately there is no known signal this is a real time system that can process any signal at any time . the only parameters known are BW and gain of the chain

regards

Hi,

unfortunately there is no known signal

Click to expand...

this doesn´t fit to the posts before ( at least in my eyes)

...when the input signal is digitized it deviates from its expected value...

Click to expand...

here i thought you expected a special waveform and amplitude...

...the input to the ADC is always a square wave with ...

Click to expand...

and here is a description of the waveform...

**********

so maybe you need something like an"eye diagram" to check your signal.

Or is there a (mathematical) description of your expected signal.(mabe: low level, high level, duty cycle, rise time, fall time......)
Or you do a FFT of the "expected signal" and compare it with the FFT of the "sampled signal"

There are a lot of ways to validate a signal.

Or - from your experience - can you describe the most interesting errors like: noise, overshot, level mismatch....

I´m sure there is a solution to your problem.

Klaus

Hi

how do I know that there is some certain value is that when the ADC is tested alone on test bench it has some specific output in correspondence with the applied input like

it has a step size of 4mV or every increase of 4mV input the output of the ADC increases by 1 digital level. ( as per data sheet)

but on test bench it carries certain PCB noise and the output varies in 50 digital levels

Now when it is integrated with some other PCB the output varies in 100 digital level

the most occurring noise is from PCB, environment and power supply that is random noise

I took the FFT of the signal but probably could not get the point how to implement it

regards

Hi,

i still don´t understand what you want to achieve with the measurement.

Is your ADC on a test bench or not?
Do you have a known input signal or not?

What parameters do you want to test?

with "digital values" do you mean "LSB"?

******
When you are talking "output varies 100 digital level" means that there is 100LSB unwanted signal/noise? If so, then your PCB has big layout problems.

What ADC type/manufacturer are you talking about?
Did you read it´s datasheet and relating application notes?


Klaus

OK let me explain


the system is as

input sensor-----> ADC card ---> digital data processing


we perform test bench testing of each module `to verify and note it behavior with known input (like using function generator for ADC)

the individual testing shows that the ADC is deviating from the expected value

when the input is taken from sensor ( integrating first two modules) the deviation increases
and when I process the data in the processing section the error is introduced due to noise present in the signal

I hope u got my point if something is still unclear please tell me

regards

Hi,

still a lot confusion.

Now there is a sensor and modules .... you never said this before.
what modules?

*********
Maybe we try a new start. (or another reader can clarify)

You do the test on a testbench:
Then you have a very detailed knowledge what you need to test.
Let´s begin with the hardware. Please describe only the hardware you need to test (DUT):
* is it a single ADC (IC production test)
* or is it a complete PCB with other circuit that you also need to test as a whole circuit? (like amplifiers, filters, sample and hold, ADC ..)
* or is it a complete metering system with sensor, signal conditioning, filtering, ADC.... and you need to test allthos components?

Then to the teststeps.
What parameters do you want to test?
* noise,
* linearity,
* precision (gain, offset)
* distortion
* others: (please write what parameters)

Other devices you need for the test:
You speak if a function generator. Pleas describe the output signal of this function generator. (Hopefully it is the input to your ADC)
Are there any other devices involved in the testing? What?

You write:

that the ADC is deviating from the expected value

Click to expand...

Describe the "expected value": is it gain, offset, noise? What value (min/max) do you expect?

Or - even better - can you give us a draft of then DUT and of your test arrangement?

Klaus

KlausST said:

Hi,

still a lot confusion.

Now there is a sensor and modules .... you never said this before.
what modules?

Klaus

Click to expand...

" By module I mean the hardware module, that sensor that takes in the input is module 1 ADC is module 2 and signal processing PCB is module3"
*********

KlausST said:

Maybe we try a new start. (or another reader can clarify)

You do the test on a testbench:
Klaus

Click to expand...

" Yes we test every PCB on test bench as standalone to verify its very own behaviour"

KlausST said:

Then you have a very detailed knowledge what you need to test.
Klaus

Click to expand...

" No... then we get to know that what was expected to get out this design and how the design the actually behaving"

KlausST said:

Let´s begin with the hardware. Please describe only the hardware you need to test (DUT):
* is it a single ADC (IC production test)
Klaus

Click to expand...

" No it a complete 8 channel ADC PCB"

KlausST said:

* or is it a complete PCB with other circuit that you also need to test as a whole circuit? (like amplifiers, filters, sample and hold, ADC ..)
Klaus

Click to expand...

" Yes its a complete PCB based on Analog Devices ADC IC and we test the ADC PCB as a whole"

KlausST said:

* or is it a complete metering system with sensor, signal conditioning, filtering, ADC.... and you need to test allthos components?
Klaus

Click to expand...

" Three PCbs make a whole system first sensor PCB that converts the intercepted signal into electrical signal second ADC PCB that performs digitization third is the processing PCB where w apply algo on the digital data"

KlausST said:

Then to the test steps.
What parameters do you want to test?
* noise,
* linearity,
* precision (gain, offset)
* distortion
* others: (please write what parameters)
Klaus

Click to expand...

we test
1- the output corresponding to certain input (expected vs real) in order to see how much the channels match to each other

2- linearity

3- the noise that lies in the output signal. as the input is from FG so supposing that input signal is clean the output noise refers to the noise introduced by the ADC itself

KlausST said:

Other devices you need for the test:
You speak if a function generator. Pleas describe the output signal of this function generator. (Hopefully it is the input to your ADC)
Are there any other devices involved in the testing? What?
Klaus

Click to expand...

the output the ADC is a pulsed signal with the voltage ranging from 0-5V and frequency from 0 to 5MHz

other devices is calibrated power supply and oscilloscope /logic analyzer for data recording

KlausST said:

You write:

Describe the "expected value": is it gain, offset, noise? What value (min/max) do you expect?
Klaus

Click to expand...

" No it is only the output value of the ADC that corresponds to that specific input level"

Hi,

Thanks, this now helps a lot to understand.

To simplify discussion:
Do you think it is possible for the rest of the thread to focus just on the standalone test of the 8 channel adc module?
(If you have question on other modules, please start another thread)

To test step 1:

1- the output corresponding to certain input (expected vs real) in order to see how much the channels match to each other

Click to expand...

For this test usually you have to feed a fixed DC voltage to the adc inputs.
Please tell me if this is not a DC voltage.
The test procedure usually is:
* sample continously
* wait a fixed time for tha analog adc input voltage and the digital filter output to settle.
* take the average of a lot of samples (for each channel independently)
("number of samples" can be optimized)
* write the values to the report
* make pass/fail decision by given min/max limits.
--> a fir filter is not necessary, but if it is present, it should not influence the result

This is how this test could be. If your test prcedore deviates from my description, then please tell us.

Klaus

Hi

Surely we can focus on ADC testing

Let me explain the way we test our ADC board

1- one channel at a time is connected to the FG
2- A fixed ON and OFF time is selected to generate the pulse
3- A voltage sweep is given keeping ON/OFF time fixed
4- the procedure is repeated for all the channels one by one
5- then the dutycycle (ON/OFF time) is changed and the procedure is repeated
6- Yes the sampling is on free running clock that is 50MHz and samples continuously
7- the data for each step is recoded and save to be analyses later
8- please note that each step corresponds to a fix ON OFF time and a specific voltage
10 no filtering is applied on the raw data
11 it is analyzed as rx

regards