How to find dangling vias in allegro?

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Logiks

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Hello all,

I am new in allegro tool. Is there any option to find dangling vias in allegro as same like in expedition pcb?

I need urgently..Any body please help to solve the problem

Thanks in advance ,
Logiks
 

Thank you for the above response. Please refer below image and reply me.
 

dear Logiks;
if you can explan for us the mean of
1- dangling vias
2- Dangling lines
3- Antenna vias

and how it affect our design.
i design electricity meter and it must meet some slandered as

1. Radiated RF immunity (IEC 61000-4-3)
2. Conducted RF immunity (IEC 61000-4-6)
3. Electrical fast transient/burst Immunity (IEC 61000-4-4)
4. Surge immunity (IEC 61000-4-5)
5. Electrostatic discharge (ESD) Immunity (IEC 61000-4-2)
6. Radio interference suppression (IEC 61000-1-1)
 

- Dangling lines have at least one end not connected.
- Dangling vias have one or no connection
- Plus are not a testvia or a thieving via.
- Antenna vias do not have connections on their start and end layers.
- Plus they are not a thieving vias.
- Optionally, VOLTAGE nets, testvias and through vias can be suppressed with
the environment variable report_antennavia.
- Section may be suppressed by variable report_noantennavia.
- In all cases output is suppressed if an object has the OK_DANGLE
property or is not part of the current partition.
 

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