How to find area of my design?

[Collang2]

When I write
dc>report_area
my design is 500.

But I don't know exactly how big that is. how many mm^2 the design actually is?

I found out through my technology file that the size of the 2 Input NAND gate of this library is 1.

But I don't know the " NAND size! ", how many mm^2 the gate actually is?

And can't I check the size of the macrocell in DC?

 

[tsmith35]

When I write
dc>report_area
my design is 500.

But I don't know exactly how big that is. how many mm^2 the design actually is?

I found out through my technology file that the size of the 2 Input NAND gate of this library is 1.

But I don't know the " NAND size! ", how many mm^2 the gate actually is?

And can't I check the size of the macrocell in DC?

This may be helpful:

How the gate count of a design is determined?

 

[Collang2]

This may be helpful:

How the gate count of a design is determined?

Ummm... I can know the number of NAND gates in the design, but do I need help from the vendor to know the size of the NAND gates?

 

[dpaul]

As I understand it the number of gate equivalent is a term used to define/compare how a big design is.
The silicon area consumed by a design is something else. The silicon area will depend on the target technology.

 

[ThisIsNotSam]

are you using an academic library? this notion of an area of "1" is strange. in real commercial libraries, all area values are given in the LEF file