How to evaluate the performance of TDC?

[ducvilla]

Hi everyone,

I've just finished design TDC. I check each output code in very small period of time to find out it is correct or not, surely that is not the way, but I don't know what's the best way to evaluate the performance of my design.

Could you please give me any suggestions about evaluate the performance of TDC such as: ENOB, INL/DNL.

Thank in advances.

 

[KlausST]

Hi,

try to use a signal source driven from the same clock as the TDC.

Or use a low jitter clock source. Maybe "Rhode & Schwarz" has one.

I cheaper way is to buy an oscillator with specified low jitter. Like www.abracon.com "ABLJO" : https://www.abracon.com/products.php?search=osc&type=XO&subtype=Ultra-Low Jitter

Good luck

 

[ducvilla]

Thank KlausST very much. Your comment is really good for me after my chip is fabricated.

Currently, I just wonder how to simulate ENOB, INL/DNL of TDC. So do you have any suggestion for simulation?
Best regards.