I'm planning to draw the layout of a circuits based on RF CMOS transistor. I'm looking for a material or tutorial showing how to do that and the consederations to take into account. I need a very basic tutorial such as CMOS RF Inverter or CMOS RF dff layout tutorial.
In fact a big difference exist between the conventional layout and layout for RF transistor.
I'm planning to draw the layout of a circuits based on RF CMOS transistor. I'm looking for a material or tutorial showing how to do that and the consederations to take into account. I need a very basic tutorial such as CMOS RF Inverter or CMOS RF dff layout tutorial.
In fact a big difference exist between the conventional layout and layout for RF transistor.
I think the different beteween the conventional layout and rf layout is the parasitic cap and resistor, And at the same time the noise isolate of RF mos should more effective. So you'd better add more guardring for RF MOS, it is very improtant.
I think the different beteween the conventional layout and rf layout is the parasitic cap and resistor, And at the same time the noise isolate of RF mos should more effective. So you'd better add more guardring for RF MOS, it is very improtant.
The layout in the Slides are ordinary layouts. The document focuses on the wireles system and not on layout.
Thanks anyway for the Help.
@jecyhale
I dont share your opinion on that point. In fact the layout of RF CMOS is complicated and compleately different compared to the known analog layout.
And I think that they are made with SOI instead of MOS. Please correct me if I am wrong.
I believe SOI is a good choice, but usually it is not available in common RF process.
And if you only design a rf system without much digital block, SOI is too expensive.
This is my opinion. Very glad to disscuss with you.