girih192002
Full Member level 2
Hi Guys,
I did RCX extraction of my design and i have generated av_extracted view of layout and i can see parasitic Resistance and Capacitance in that View. I would like to do Post layout simulation of that view.
can any body tell me how to do post layout simulation with av_etxacted view in Analog Design Envirnment (ADE). I read some where on net we can do simulation in this way also. there is no need to use netlist.
I did RCX extraction of my design and i have generated av_extracted view of layout and i can see parasitic Resistance and Capacitance in that View. I would like to do Post layout simulation of that view.
can any body tell me how to do post layout simulation with av_etxacted view in Analog Design Envirnment (ADE). I read some where on net we can do simulation in this way also. there is no need to use netlist.