EEstudent
Newbie level 3
Pads in TSMC0.18 library
Hi,
1. I am designing a LC VCO using TMSC 0.18 and I noticed there are no pads in the library. I need to submit the design for fabrication. I want to know is there any way I can do the layout of the pads and I will be thankful if there is any tutorial for doing layout of pads.
2. The minimum value of inductor I am using is 2.3nH in TSMC 0.18um. But I need a lesser value of inductance for 5GHz operation. I have to use two inductors in parallel but it occupies lot of chip area. I need a wafer level design where I dont want to use bond wire inductance. Is there are way I can create my own inductor and use it and I want to know if at all I use the new created inductor is it fabricatable by MOSIS. I need alternatives for overcoming this
Thanks
Hi,
1. I am designing a LC VCO using TMSC 0.18 and I noticed there are no pads in the library. I need to submit the design for fabrication. I want to know is there any way I can do the layout of the pads and I will be thankful if there is any tutorial for doing layout of pads.
2. The minimum value of inductor I am using is 2.3nH in TSMC 0.18um. But I need a lesser value of inductance for 5GHz operation. I have to use two inductors in parallel but it occupies lot of chip area. I need a wafer level design where I dont want to use bond wire inductance. Is there are way I can create my own inductor and use it and I want to know if at all I use the new created inductor is it fabricatable by MOSIS. I need alternatives for overcoming this
Thanks
