Could anyone tell me how to let reset tree like clock (creat_clock + set_dont_touch_network) which has no any buffer inserted then let back end tool to insert buffer like CTS?
The failed symptom is :
the reset network's attribute is dont_touch & ideal_network, and no buffer, that seems right, but in every submodule's reset input pin all have a buffer.
Could anyone tell me how to let the buffer that in the submodule's input pin disappear, then let the reset network really buffer free.
Or it's normal??
It's failed due to my reset circuit is posedge trigger, but my library just have negedge trigger FF, so in every sub-block all have a inverter
...... :wink: