I haven't worked much with Assembly language but regarding
What is interrupt latency time???
Interrupt latency: what yuo have said is right !
how much time the processor takes to serve the ISR.
For example if you have two ISR's both differing with priority, the lower priority ISR has to wait till the higher to complete but the output depends on the second one, the interrupt latency for second ISR increases and if its for longer time the system stops responding for a moment, and you might feel your system is not responding or not working properly.
so longer interrupt latency is no good
In PIC it is 3 Instruction Cycles Long why??
Thats due to machine level architecture, 3 instruction cycles are fetch decode and execute which is for a basic PIC , latest processor are up to 14 instruction cycles.
The concept of " pipelining " helped to built speed machines and came advanced ARM processors, due to cost basis still PIC controllers are in use.
if intersted you have to read about Instruction pipelining of the particular processor.
Apart from that can anyone provide me some information regading how interrupts are handled internally by the compiler and assembler, i.e what will happens when controller gets interrupted, how it reaches particular address and what will happens if someone calls another function in interrupt.
For you understand, what happens internally you have read multiple documents.
I suggest you start reading "Beginning Linux programming" , you need not work with Linux OS, but it explians well.
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"Beginning Linux programming" , Richard Stones , Neil Mathews !