How to determine the parameters of parasitic pnp transistors

[leonken]

When I design a bandgap voltage reference, I have to use a parasitic pnp transistor to generate a Vbe voltage. I selected a 0.35um CMOS process for our design. But the foundary did not provide some informations about such parasitic pnp transitor. My questions are:
1. Who can give me an example of the transitor for Hspice simulation.
2. How to desing/control some parameters such as: Is,n... to control the value of Vbe's temperature coefficient?
Thank you!

 

[cetc1525]

if you have the format of the models.why can not you build a model?

 

[Fom]

Re: How to determine the parameters of parasitic pnp transis

You can control Is by area, but for bangap Is value not so important. For ideal junction n=1, but for real device in can be little bit different (usual higher than 1). It is called non-ideality coefficient, so you cannot control it. It is strongly recommenden to use foundry model with reliable temperature coefficients. You also can design bandgap without foundry model, but in this case you will have to make a design correction after first wafer run and temperature testing.

 

[ning0703]

You can control Is by area, but for bangap Is value not so important. For ideal junction n=1, but for real device in can be little bit different (usual higher than 1). It is called non-ideality coefficient, so you cannot control it. It is strongly recommenden to use foundry model with reliable temperature coefficients. You also can design bandgap without foundry model, but in this case you will have to make a design correction after first wafer run and temperature testing.

 

[aryajur]

Re: How to determine the parameters of parasitic pnp transis

Where can I get the foundry model from???

 

[sunking]

Re: How to determine the parameters of parasitic pnp transis

If you make a contact with the foundry, and sign off some sth, tell them you will tape out to them, they will give your the model,and design rules