Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to determine Power/Ground Pad number in Chip?

Status
Not open for further replies.

clifftsai

Newbie level 6
Newbie level 6
Joined
Feb 19, 2002
Messages
14
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
92
Hi:

How can I use more accurate analysis or steps to
determine the number of VDD/VSS (Power/Ground)
I should have in CHIP to supply enough current
and power for CHIP core and I/O pad.

There are two kind of Power Pad generally.
(1) VDD/VSS for core.
(2) VDD/VSS for I/O.
How to decide the number of them.

thanks!
 

I wrote quite large list of recommendations, but this f... server logged me
out and everything was lost. So again briefly:
There are recommendadion for your I/O library provided by vendor,
use also spice to simulate SSO and package inductancy effects.
I took always more pwr pads than came out from these calculations
Core: You need power estimation, IR drop analysis on your rails and state
the limit to be able to rely on your timing analysis.
 

Number of Power pad is mainly decided by max. DC and AC current. for analog circuit, DC current is important, and for digital circuit AC is important.One pair of VDD/VSS pads(60umx60um), The max. current is about 60mA. General, at least 20% margin will be given.
 

another question

how to determine the power-ring and guard-ring width in the chip ? I have heard there is a formula , does someone know how to calculate ?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top