How to determine MOS Switch aspect ratio?

what is aspect ratio of nmos ?

Hi there,

Currently, I am a student and working OTA with switch-capacitor CMFB and later going to switch-capacitor amplifier design. I am wondering which is the best MOS switch aspect ratio.

Say, for TSMC 0.35um technology with 5v process, the minimum length is 0.5 micron. So how can I choose the W/L for NMOS switches in switch-capacitor CMFB and also in sampling and amplification?
where should I deploy transmission gates switch and NMOS only switches?

I have read Martin's book, Razavi book, and some papers. Some said with minimum length and wide width; some papers said even with long switches to reduce clock feedthrough ( in 2004 ISSCC).

So I am confused. Can someone tell me the more pratical rules and more specific rules on this?

ethan

1st of all, to decide whether you can put a transmission gate or a NMOS/PMOS only switch depends upon what the switch has to pass. NMOS can pass low voltages properly and not high voltages, while a PMOS does the opposite. SO in inputs that need to pass high and low values would require a transmission gate.
To size an individual switching transistor, which is used to pass signals, you need to make the drop across the switch as low as possible, i.e. its ON resistance should be low. Using a transistor as a switch we operate it in the triode region (MOS) or Saturation region (BJT) so from the triode region equation you can calculate the resistance of the switch and try to minimize it. It will be easily seen that W has to be as large as possible. But you also have to consider the parasitic capacitance that increases with increasing W. So increase W only upto the amount upto which the parasitic capacitance value is acceptable. The parasitic capacitance will hurt ur bandwidth if you care about that, also it will waste half of your signal power in charging and discharging every time.