how to design "voltage control slew rate "

Status
Not open for further replies.

tryagain

Newbie level 1
Joined
Jun 14, 2002
Messages
0
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,282
Activity points
797
Anyone help me,how to design a "voltage control slew rate circuit" for rise rate and down rate,
THANKS!
 

Insert voltage-controlled current sourses in series with PMOS and NMOS transistors of output inverter. Complexity will depend on specs. Do you have any specs on linearity and tolerance of this controlled slew rate?
 

I have an Idea, but maybe is not the best.
Since slewrate limits the slope of the signal, you can use a diferentiator, then a simple variable voltage limiter, and the an integrator.

Theorically, I could work.
 

thanks first!
I want use it for my electronic load,need very fine linearity and 1% tolerate, Could you give me a SCH.
iwfnotstop@yahoo.com.cn
 

I think that first you can create a voltage control current source, then use this current to control the slew rate.
 

Slew rate is proportional to the driving current, so first build a linear current source, I think you can use some negative feedback to design, then use the current source to control you output current.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…