In fact I didn't want to suggest a design method. I only wanted to tell an order of magnitude for C1 to keep the filter parameters with additional gain. To implement a specific filter prototype, e.g. butterworth that seems to be intended by the original poster, you would perform an exact calculation of all filter components.
I also didn't discuss component parameter sensitivity. I completely agree with LvW, that the increased sensitive against gain or time constant variations is a strong argument against Sallen Key topology with gain > 2 or 3. You'll be able to get 1% tolerated resistors, but C1 tolerance will be an issue.
A possible workaround for lower filter frequencies is to use low impedance gain set resistors and connect C1 to inverting input instead of OP output, with original G=1 RC parameters. Of course, there's a certain feed forward effect, you have to decide, if it can be tolerated.
As LvW explained, the DC gain has to be considered as well, the original circuit from post #1 didn't.