Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to design multiplexer in VHDL?

Status
Not open for further replies.

engel

Newbie level 4
Newbie level 4
Joined
Jun 29, 2004
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
48
hi all

please,i have a problem with a multiplexer 12 input and 9 output

in cypress show this message:
Error: Logic equation has too many product terms on signal sal(8).
Error: Logic equation has too many product terms on signal sal(6).
Error: Logic equation has too many product terms on signal sal(5).
Error: Logic equation has too many product terms on signal sal(4).
Error: Logic equation has too many product terms on signal sal(3).
Error: Logic equation has too many product terms on signal sal(2).
Error: Logic equation has too many product terms on signal sal(1).
Error: Logic equation has too many product terms on signal sal(0).

how i can design this multiplexer in vhdl?
is possibble modify the number product terms?
 

generate equation from multiplexer

Hi friend ..
It seems that you have a mapping problem You don't say in the message what type of device you are using but i bet is a CPLD .. Because people that deal with VHDL design for CPLD goes thtough this type of problems .
It seems that you have a piece of vhdl code that systhetizes to a logical statement that implies more than 8 ( depending of the device) Pterms
and This device you are using can't handle more than those 8 (depending of the device in 22v10 is 10 ) i mentioned .
First are you shure that you still have room in the device ..i mean be shure that there are still at least one CELL avalaible .
Otherwise is imposible .. One way to find out is to comment out some of the terms that give you trouble and and compile and GENERATE A REPORT to se cell USAGE ..
If there are cells avalaible well i seems that the sinthetizer that you are using is not very good .. In that case .. create a intermediate term grouping all the signal that didn't fit and plug in the vhdl code this intermediate new term in the original equation ot vhdl statement ..

When dealing with low count CPLD is better to do it using some sort of assambler .CPUL ,PALASM ,ABEL etc .

good luck
 

multiplexers sample problems logic

hi

i have a gal22v10 and here is the code in vhdl. i need use this device
:cry:
 

sample problem for multiplexer

Hi,

I took your code and tried to implement in GAL22V10. Impossible, the number of functions you want to implement is to big. It fits in a 128MC device but uses only 21 pins.
Do you realize what you want to do. This is actually a ROM table (input is address, output is data), so I suggest you implement this in a EPROM, or Flash device. OF course you'll need to think this over.
 

implement multiplexer in cpld

the code you have written is really big to fit on a CPLD, check fpga you cando this code on a blockRam
 

multiplexer vhdl

hi all and thanks for your answer

It is possible to implement the code on 4 gal22v10 or four pal?
 

multiplexor con gal22v10

Hi,
I tried to spread the design over 4 GAL22V10, but it didn't work.
However as stated above, you can implement in a medium size CPLD, or use a ROM table and implement in FPGA (what a waste of logic).
I rather suggest using an (E(E))PROM.

Regards
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top