How to design LDMOS PA

[jackyqiu]

ldmos pa

Using Philips BLF1820-90 to design 1.9G 30W PA, download datasheet from the philips website, but don't find simulated file. who can tell me how to match its input and output using microstrip in ads?
thanks in advance!

 

[Element_115]

ldmos biasing ads

Hi jackyqiu

I just / still am designing LDMOS PA's. Is what you end up doing is:

1) Design an Input match Schematic. For "TERM 1" use 50Ohm (Default)
But for " TERM 2"(To the input (Gate)of your FET) use the Conjugate
match impedance form the data sheet. Make sure you know if the data
sheet gives the "FETs" Impedance or its Conjugate Impedance.

2) Do the same for the output . For "TERM 1" (To the output of your FET)
use the Conjugate match form the data sheet. For " TERM 2" use
50Ohm (Default) .

3) Make 2 more circuits the same just 10-20MHz +/- Fo this will help you to
make fewer re spins of your board design.

4) If you take these designs in to Momentum use "Port Editor" To change
the port value . And in Momentum I could only model the strip line art
work and not any Biasing resistors, Cap etc...

Or you can mimic the art work in the data sheet.


Hope this helps.

 

[jackyqiu]

ldmos match

hi, element115

first thank ur suggestion.i don't find its input/output imdence in datasheet, but find its referrence layout; if conjugate match, PAE and efficency is best, general way is loadpull in design PA.
whether can i get ur referrence, could u send me ur schematic .
thanks!
my e-mail:qiuxuelai@hotmail.com

 

[yykk]

ldmos internal matching design

HI,

what EM software are u use, I use the MO, but the result is different from the reference design.

Can u give some comment to me ???
thanks :lol:

 

[pva]

hi jackyqiu
my advise is to make design from application note (BLF1820-90_2.pdf).There is enough tuning components that you can use to fit your requirement.For correct simulation PA you need nonlinear model look in @DS library for this LDMOS or search it on @DS website.

 

[MoonShine]

Jackqui,

Usually the large signal impedences are provided, also some dvices have internal matching; I'm not familiar with that BLF part number, but if this info isnt proivided, they may provide sparameters that can be used as a beginning. If not sparameters can be measured and a circuit can be designed to match the in/out based on the small signal large bias simulator in ADS (LSSP); which uses Harmonic Balance Technique. This approach usually gets you close, then you can start to tweak it on the bench with stub tuners ..etc. Once you have this you can "sniff" the In/Out using an RF Network analyzer to obtain the large signal impedances. Once you have the large signal Z's a matcjhing circuit is easily created via several methods. Hope this helped.

Regards,
MNoonShine

 

[molloy]

Hello,
you can find the output impedances in a graphic form on the datasheet for a certain bias point. Thats the usual way u can find data. It could be better if you could have the equivalent circuit for the output of the ldmos and so tryind to match it. Contact philips, maybe it can provide you with such a circuit. Usually the input matching is not so difficult but it would be better if u have the spara and then you could try to match the input for the maximum gain
hope this helps

 

[zkmicrowave]

use s-parameter is only linear model,how to simulate the nonlinear simulation?

 

[MoonShine]

ADS has a LSSP simulator that takes the spars and performs a harmonic balance simulation in order to obtain the large signal response. Otrherwise you need a large signal model.

Regards,
MoonShine