How to design an OTA with very low Gm?

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OTA with very low Gm

How to design an OTA with very low Gm.

I know that Gm is proporational to the square root of I*(W/L). My question is that if we only reduce the tail current , then there is possible that the transistor will not be in saturation region. Also the W/L can not be very small.

In fact, I am looking for some techniques to reduce the Gm while maintian decent tail current and device size. anyone have such kind experience ?

Thank you for your help !
 

OTA with very low Gm

Firstly its very surprising to know you want as low gm as possible, operating the transistor in saturation when whole world is after high gm.

There are only 3 methods i can think of
1. work in triode region-low gm, behaves as resistor rather than an amplifier.
2. Low I-can reduce till MOS is in sub threshold. Actually gains are pretty high in subthreshold.
3. Low W/L or high L- This can be done easily. Increase L till it goes to triode region.

Dont know anything else other than deliberately killing the gain by methods such as source degeneration. But these techniques are to achieve something else. It will be good to know why you want low gm.
 

Re: OTA with very low Gm


Any OTA linearization technique will result in a very low gm - examples are bulk driven OTA, floating gate OTA etc. These papers and lecture notes describes the techniques.

Papers :




Lecture notes :

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Bharath
 

Re: OTA with very low Gm

hi lavitaebelle,

my OTA is used to control the pass transistor. For the EMI noise problem, I would like to make the switching slow enough, this is why I need some techniques to reduce the Gm.

Added after 1 minutes:

hi tsb_nph,

Thank you for your information, I keep it.
 

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