How to design a PLL according to specs?

Status
Not open for further replies.
H

hanjiemy

Member level 2
Joined
Jun 11, 2004
Messages
53
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
412
Hi all,

I want to design a type-2 pll which consists of PFD(general), Charge Pump, passive LPF (2order), LC tank VCO, Feedback Divider N.
I know Icp=50uA, vco gain=40MHz/v, vco output frequency range is 150MHz-220MHz, Z(LFP)=(1+sRC2)/(C1+C2)s(1+sRC1C2/(C1+C2))), then R=10k C1=10nF, C2=39nF.

I calculate: t1=79.6us; t2=390us;and
Loop BW is 904Hz, is right? and Phase Margin???

thank u very much!
 

use matlab for system simulation (S-Domain) to check stability of the loop first, then u can use matlab for transient sim. of the loop with swiching nature of Phase-detector considered.


NOTE: do not simulate pll with spice before system simulation or u will waste your time!

BEST!
 

if you have cadence run a behavioural simulation first using the verilog a blocks and you can simulate the PLL quickly, better set up then matlab and very fast

if you have cadence
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…