How to design a low-voltage to high-voltage level shifter?

[lokeyh]

Level shifter

Hi,

I need to design a low-voltage to high-voltage level shifter. Is there any recommended ebooks or papers on the designing of low-voltage to high-voltage level shifter? Any recommendations on the architecture for level shifter?

Thanks in advance.

 

[Colbhaidh]

Re: Level shifter

What voltages are required ?
See attached jpeg for 1.8V to 5V up convertor

 

[yeewong_su]

Level shifter

Use above CKT. please pay attention the positve feedback and latch the voltage

 

[djalli]

Re: Level shifter

Hi,
designing of low-voltage to high-voltage level shifter? Any recommendations on the architecture for level shifter?

How much high-voltage level shifter we are talking about? If it is in ranges of 5-100volts use a power opamp and if more I suggest you to use a transformer.

 

[piao]

Level shifter

Hi, yeewong_su,

Can you provide more in detail about those stuffs?

Thanks in advance

 

[lokeyh]

Re: Level shifter

I am asking in terms of IC design. The problem with the circuit provided by yeewong_su is that it depends on how low the 1.8V can go. if the 1.8V goes down to 0.8V, the thick-oxide NMOS at the 2.5V portion will not be able to pull the signal low. Is there any other circuits?

 

[Colbhaidh]

Re: Level shifter

Try this one (TK =thick gate )

 

[lokeyh]

Re: Level shifter

Hi Colbhaidh,

I will try the design.

Hi all,

Are there other architectures for level-shifter?

 

[kkoko]

Re: Level shifter

If your siganl come from NMOS transitor you can use PMOS common drain circuit to obtain high voltage level shift

 

[Teddy]

Re: Level shifter

how about to mirror current? Use NMOS for mirroring. It works but I can't show the structure.....

 

[dreamheater]

Re: Level shifter

This also depends on how fast the signal goes, and how much load needs to be driven. I assume the input is a digital signal while the output is to control analog circuitry. The cross coupled structure can work up to MHz range. If higher speed is needed, may need to cascade a few inverters.

 

[kawaiicat]

Re: Level shifter

any reference books talk about?
i want to learn how to design also
= p

 

[chihyang wang]

Level shifter

It is quite interesting to read the low-voltage to high voltage level shifter . But I meet a problem. I need to design a 1Gbps to several Gbps PECL output buffer, the traditional source follower's efficiency is too low . Is there any good alternative choice?

 

[alanbrooke]

Re: Level shifter

What is the speed of your level shifter?
For the frequency under 300MHz for 0.18um CMOS process, you could use the simple circuit with 2 PMOS latch and 2 NMOS .

 

[jiangwp]

Re: Level shifter

The <<CMOS :CIRCUIT DESIGN, LAYOUT, AND SIMULATION >>
By R.J Baker etc.

PP 370 .