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how to design a LNA (10-12Ghz)

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alex123

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ne3210s1

transistor ATF-36077 (HP)
design 11GHZ LNA
Gain > 12.5 dB
Noise Figure = 0.6 dB ± 0.1 dB
Input return loss > 10 dB
Output return loss > 15 dB

i have some questions:
1.design information, Noise Figure, Noise Circles, Available Gain, Output Match, etc. can be find with ADS simulation??? if not, how to find these information?
2.Use the information above to design a 11 GHz LNA
how to Select source impedance ?
Circuit topology selection?
3. how to know the LNA design is ok?
simulation the circuit and measure S11>10db ,S22>15db. S21>15db? if i meet these requirements ,it is ok?


plz help me, thanks.
 

ads nscir

i am also trying to desing such amp but with NEC transistor NE3210s1
it is also a very good tarnsistor , which can provide .3 dB noise figure

use @DS or Mwo , they both great to do the job
 

nscir in ads

alex123 said:
transistor ATF-36077 (HP)
design 11GHZ LNA
Gain > 12.5 dB
Noise Figure = 0.6 dB ± 0.1 dB
Input return loss > 10 dB
Output return loss > 15 dB

i have some questions:
1.design information, Noise Figure, Noise Circles, Available Gain, Output Match, etc. can be find with @DS simulation??? if not, how to find these information?
2.Use the information above to design a 11 GHz LNA
how to Select source impedance ?
Circuit topology selection?
3. how to know the LNA design is ok?
simulation the circuit and measure S11>10db ,S22>15db. S21>15db? if i meet these requirements ,it is ok?


plz help me, thanks.

Go to Agilent Semiconducter site and you'll find good information about LNA applications for ATF-series.
 

also see
www.rfic.co.uk
u will find a very good tutorial about RF amp design
using @DS


khouly
 

Hi there,
in ADS you can draw all the circles you need by simple functions. Check Simulation S-Param. At the bottom there are such components as NsCir (that gives you the Nf ) and GaCir, GpCir and others. And the output match you can check by S22.
If anything else comes to my mind I'll let you know
Best wishes
ania
 

thanks all, i have simulated the amplifier 10Ghz -12GHz
transistor ATF-36077 (HP)
requirement:
Gain > 12.5 dB
Noise Figure = 0.6 dB ± 0.1 dB
Input return loss > 10 dB
Output return loss > 15 dB

the result are:
k-factor <1 .so i added a resistance at output in series, then the k-factor >1 ,but the NF is 0.9 , what shall i do to reduce the NF ?

and i just simulate the ATF-36077 without any other ciurcuit, but i got 0.9 NF ( i check the nf2),why?

if i want to design the match circuit , how to find out the Γinput (using noise circle and gain circle? or use Sopt ?
and may i use

Γoutput=s22+(s21*s12*sopt)/1-sopt*s11) to caculate it?
 

hi alex,i obain k>1 (stability factor),without any resistance at output,but i have n.f.=1.3 db with gain of 7 db and s11<-13 db,s22<-15 db,u can obtain n.f. small and high gain but with s11 and s22 may be -5 db at all band,choose u want
regards
 

i think in this frequency u shouldnot use a resistance , u ca design the matching networks to make the amplifier stable
see gonzalez text book
 

hi,abdoeng
what's your frequency?
my requirement is 10-12Ghz,
and how to design the matching circuit? i mean how to find out the Γinput and Γoutput?
i plotted the noise circle(@0.6 db,11Ghz) and gain circle (@13db,11Ghz),find out the Γsource then i use Γload=s22+(s21*s12*Γsource)/1-Γsource*s11)to design the output matching circuit, is it ok?
 

you can also choose fhx13lg(fujistu).
K is an important factor(>1),it's a base(first step) for amplifier design.
you can use smith tool of ansoft designer to give the match for
source or load.
better for you!
 

alex123 said:
hi,abdoeng
what's your frequency?
my requirement is 10-12Ghz,
and how to design the matching circuit? i mean how to find out the Γinput and Γoutput?
i plotted the noise circle(@0.6 db,11Ghz) and gain circle (@13db,11Ghz),find out the Γsource then i use Γload=s22+(s21*s12*Γsource)/1-Γsource*s11)to design the output matching circuit, is it ok?
hi alex my band 8-12 with fcenter=10,i get better n.f 0f 1.2 db at 10 ghz wihs11<-12 db and s22<-13 db with gian of 7 db.
i get first input and output matching then try to add empirical stub and t.l. at input and output ,take care of biasing circuits of drain and gate with t.l. of source pins
contact me
 

abdoeng. i got s11=-13db, s22=-34dB ,gain=13.6db at center frequency(11Ghz), but i want to get s11<-10 db, s22<-15db, gain >12.5 db between 10Ghz-12Ghz, what should i do? cause at 10gHz and 12Ghz ,my s11,s22 and gain are so pool, help me ,thanks
 

alex123 said:
abdoeng. i got s11=-13db, s22=-34dB ,gain=13.6db at center frequency(11Ghz), but i want to get s11<-10 db, s22<-15db, gain >12.5 db between 10Ghz-12Ghz, what should i do? cause at 10gHz and 12Ghz ,my s11,s22 and gain are so pool, help me ,thanks
see this picture of s11 and s22,if u accept it,i try to send u the layout,for u
send me ur schematics
 

hi, this is my design , it includes the pictures and .ds,dsn files ( my version is 2003c,if you can not open it, see the pictures)
 

what about @nsoft's smith?
 

If I use 0.18um models from TSMC, can I design the LNA with spice simulation first?
Is HSpic@ good enough? Or I must use @DS?
 

alex123 said:
hi, this is my design , it includes the pictures and .ds,dsn files ( my version is 2003c,if you can not open it, see the pictures)
hi alex,if u want high gain with n.f. small,the s parameter of input and outputbe bad,in the other side if u improve input and output s par,the gain decrease and n.f. increase due to the multi matching.
regards
 

yes, i know, but my problem is how to increase the performance within the bandwidth
 

alex123 said:
yes, i know, but my problem is how to increase the performance within the bandwidth
hi alex,u know that multi t.l. and stub flat the s par. of s11 and s22 but at same time there is scrification(bad) of gain and noise figure,if u have the schematic pls reply me at y email,could i help u
regards
 

thank you, i have uploaded the schematic and data sheet in this topic.
 

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