chis4yu
Newbie level 4
Hi,
I have a pll which can bypass the pllout with input reference clock.
So when I force bypass=1, then the input reference clock is output to the pllout.
How to describe for DFT compiler this special connection and treat the reference clock as a scan clock ?
set_dft_signal -view existing_dft TestMode -port Xscanmode_i -active 1
set_dft_signal -view existing_dft ScanClock -port Xclkref_r_i
so the Xclkref_r_i is bypassed to the pllout when Xscanmode_i=1
should the scanclock actually be defined at the output of the pll due to this special mode ?
UPDATED SCANCLOCK DEFINITION
set_dft_signal -view existing_dft ScanClock -hookup_pin {i_pll/pllout}
Thanks,
David
I have a pll which can bypass the pllout with input reference clock.
So when I force bypass=1, then the input reference clock is output to the pllout.
How to describe for DFT compiler this special connection and treat the reference clock as a scan clock ?
set_dft_signal -view existing_dft TestMode -port Xscanmode_i -active 1
set_dft_signal -view existing_dft ScanClock -port Xclkref_r_i
so the Xclkref_r_i is bypassed to the pllout when Xscanmode_i=1
should the scanclock actually be defined at the output of the pll due to this special mode ?
UPDATED SCANCLOCK DEFINITION
set_dft_signal -view existing_dft ScanClock -hookup_pin {i_pll/pllout}
Thanks,
David