how to demodulate 2fsk(f0=60M)?

[kimjin]

the 2fsk signal is :s(t)=sin((2*pi*60000000+a(t)*700000)*t),and 67m is '1',53m is '0'.
i need to design the demodulate circuit .
i look for the demodulate chip, but the the chip's f0 which finded in web is too low ,just khz. and the all digital pll need a very high frequency clk which maybe 600m, my fpga cann't work in that frequency.
i want to find a simple and with a better performance 2fsk demodulate circuit.
how can i do?
thank you!

 

[melc]

What if you're mixing first the FSK signal with an appropiate LO frequency and get those two signals at a lower baseband frequency which could be sampled by your's FPGA?

 

[kimjin]

i don't think it's the best way, because i need a lot of work (such as filter)to do after mixer.
now i'm study the if sample tech, this seem to be a good way.
how do you think of it ?
thank you.