How to define sampling capacitance in pipeline ADC?

[wan]

Hi, my friends
please help
As we know, sampling capacitance will induce noise. The value is (kt/c). How can i accurately define the least value of the sampling capacitance in THA? From SNR constraint, the calculated value of capacitance will be too small especilly below 10-bit ADC.[SNR=10log((Vfs**2/2)/( △**2/12+KT/C)].
The reference in the attachment presented a way to calculate the value of sampling capacitance.With capacitor scaling, input referred noise of each stage was calculated, and then added all of them to get the total input refered noise(?).Compare this value with 1/4LSB, and get the value of capacitance. How to evaluate this solution? Are there any other mythod to calculate the value?
thanks

 

[Syukri]

capacitor scaling in pipeline adc

Chech this out

https://en.wikipedia.org/wiki/Analog_to_digital_converter

 

[manissri]

kt/c noise pipeline

hi wan
the capacitance calculation is like that it includes the kt/c noise of capacitor and opamp also ..
the kt/c noise u compare with lsb/6
i think u get the point
manish