rohithgm
Newbie level 1
https://www.edaboard.com/threads/177485/
With reference to above link, I need similar kind of functionality. I see output "out" is used as an array. But when try to compile the code. I get error "Identifier ("out") is neither an array nor a vector. Declare identifier "out" as an array or a vector". I have declared "out" as output [0:7] out.
Can somebody help how do we declare output as an array and use it in verilogA?
Thanks,
With reference to above link, I need similar kind of functionality. I see output "out" is used as an array. But when try to compile the code. I get error "Identifier ("out") is neither an array nor a vector. Declare identifier "out" as an array or a vector". I have declared "out" as output [0:7] out.
Can somebody help how do we declare output as an array and use it in verilogA?
Thanks,