mamuni
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Helo all,
I am using a chip WT7752B,in which the three phase analog input is to be applied...if the voltage reference for the 16 bit ADC is 2.4 V then what should be the neutral voltage that we can take ?should it be equal to the reference voltage??if yes dn why(concept behind that)??
Some more datas dat would help u.Basically we have differential ADC in the IC,it is given the maximum peak voltage on the channel is +500mv to -500mv.as it is given so thus i am planning to use voltage divider that would lower down the voltage from 230rms to 395 rms(peak value approx 487 V).i dont know whether m correct or not in this even..pls guide
please elaborate the calculations and the concept behind it.i have googled beforehand but basically i dont know what xtually to read and how to understand it..m very new to d domain so please help.
I am using a chip WT7752B,in which the three phase analog input is to be applied...if the voltage reference for the 16 bit ADC is 2.4 V then what should be the neutral voltage that we can take ?should it be equal to the reference voltage??if yes dn why(concept behind that)??
Some more datas dat would help u.Basically we have differential ADC in the IC,it is given the maximum peak voltage on the channel is +500mv to -500mv.as it is given so thus i am planning to use voltage divider that would lower down the voltage from 230rms to 395 rms(peak value approx 487 V).i dont know whether m correct or not in this even..pls guide
please elaborate the calculations and the concept behind it.i have googled beforehand but basically i dont know what xtually to read and how to understand it..m very new to d domain so please help.