The charge pump converts the logic states of the detector into analog signals appropriate for controlling the VCO. The mixer is a current mirror with duty cycle control so it emulates an integrator with a gain factor K1/s . The phase detector has boundaries, within those are linear but outside at harmonics is recursive, so it is non-linear. Some may use a 2nd or 3rd order RC LPF. As a 1st order RC filter it is just an integrator with a gain factor Kf which compromise capture time and ripple rejection so, higher order filters are considered. Compared to a second-order filter, it is apparent that the gain of the third-order loop filter is increased and the phase margin is reduced. Increasing the loop bandwidth will reduce the lock time, but the filter bandwidth should not be important to avoid significantly increasing the risk of instability. In practice, the most commonly used filter used is the second-order type.
In order to determine C1 and another smaller C2 & its series Rc, you need to specify, max error frequency , capture time, jitter voltage or phase jitter of VCO required and loop stability in the presence of low SNR. This requires a closed loop solution of the transfer function.
Usually C2 is 5 to 10% of C1 for noise rejection and loop stability. C1 is chosen > max mixer error frequency that must be passed through for RC breakpoint or maximum capture time which depends on SNR and error frequency & loop gain. In this case, your FET current mirror affects gain which makes mixer more linear instead of RC exponential filter and resembles an integrator.
There are many articles on determining these PLL variables with VCO gain, mixer gain and LPF gain(f).