You need to by pass this generated clock using MUX. MUX can be inserted in design itself or now-a-days tool can also insert MUX automatically by finding such places. But definetely, second option is not receommended to be used as it may create equivalance issues.
MUX whose input 1 would be your generated clock, input 2 would be your top level main clock and select signal wuld be test_mode. so when u r in testing mode, you bypass generated clock and pass on top level main clock to all flops and when you are in functional mode you supply actual generated clock ..
hope i was clear ...