gevy
Full Member level 6
I design IC in Cadence Custom IC Design Tools.
I use more than one global nets for power supply and ground, for example, vdd_A! and vdd_D!, gnd_A! and gnd_D!.
How to connect vdd_A! with vdd_D! and gnd_A! with gnd_D! without error ?
I draw my schematic in Virtuoso Schematic Editing.
Now I connect global nets through dummy resistor, but it is inconvenient.
I use more than one global nets for power supply and ground, for example, vdd_A! and vdd_D!, gnd_A! and gnd_D!.
How to connect vdd_A! with vdd_D! and gnd_A! with gnd_D! without error ?
I draw my schematic in Virtuoso Schematic Editing.
Now I connect global nets through dummy resistor, but it is inconvenient.