how to connect cmos body in digital and analog IC?

[triquent]

How to conncet the cmos body pin in the digital and analog IC?
for example:
for 2input NAND, how to connect the upper nmos's body? to vss or to it's source?

 

[borodenkov]

In digital design always connect PMOS body to Vdd, NMOS body - to gnd

 

[khorram]

If you want to do custom design, you should design in transistor level. Therefore, you can do anything in this level. In this level you can not use different gates, and you have to implement them in transistor level.

Regards,
KH

 

[ArchAngel]

typicaly we connect PMOS body to VDD and NMOS body to GND.

if you want use it arbitary, it partly depend on the

process, only the body of transistor that can be

made in an independent well could connect to

arbitary voltage. (make sure that the vth is what

you want and field parasitic transistor shouldn't on)

 

[jiangwp]

In digital circuit :
Generally , the bulk of nmos connetcs GND!;
the bulk of Pmos connetcs VDD!;

In analog circuit :
Generally , Depending process, we can connect the bulk of a kind of mos .

But in a mixed-signal process , because of Bandgap which needs the PNP , the process is p type substrate. Then , we can make the N well , the bulk of pmos can be connected the source which is the same potential as N-WELL . This WELL is named floating well which potention of is changing as the source voltage.

Because the source connects the bulk , the voltage difference between the source and the bulk is zero , So the threshold of transistor is not modulted by the bulk voltage . In the mean time , the noise of substrate is not coupling into the MOS .

But the source level is change , this can effect the MOS performance.

 

[srivatsan]

To add:

If you have a guard ring, the noise coupling between digital and analog will be reduced.
Also floating well, may depend upon the erquirements; like if you have enough area - it would be okay, else you cannot do it. All this depends upon the number of systems you want to implement in that chip. If you are crowded, then floating may not be the option, but this would definitely couple the noise from the substrate to everybody....

- vats

 

[layes2]

of course vss and vdd
in digital circuit
but analog not

 

[SkyHigh]

To triquent,

In Digital, PMOS and NMOS are built laterally adjacent to each other, i.e. all NMOS share the same P-type epitaxial layer. Technically the bulk or body potential will be connected from the P- doping made in the P-type epitaxial layer to the Vss or Gnd. Thus regardless of upper or lower NMOS, they are still residing in the same P- epitaxial layer.

In Analog, if the design is made to be using CMOS Technology, the same principle applies. If the design is to be made using BiCMOS Technology where Bipolar Transistor is also sharing the same N+ epitaxial layer, the same principle also applies. Failing to do so results the transistors to float on unbalanced potential, thus intensifies bulk effect.

 

[srivatsan]

Well, I think there are Mixed signal boards available that have mulitple power levels available. If I am wrong let me know. If it has different voltages (sometimes for the use of level translation), then bulk connection can be made (in my opinion -> should be) custom mode rather than "standard" mode.
The reason to comment is because: I am helping a person to get one mixed-signal chip going... persons who know about this.. please comment.

- srivats

 

[rongli]

I think you choose the p-well process.for NMOS you can tie the bulk to it's source .the PMOS's body are the substrate,tied to VDD.