superhet
Junior Member level 3
hi everybody,
im a beginner in verilog and i have only made a few small designs. as a first attempt to start with new designs i was thinking of making a UART. i found a nice looking UART at https://www.opencores.com/projects.cgi/web/sasc/overview
the author says that the UART transmit and recieve FIFO can be adjusted. can somebody tell me how can it be adjusted. acutally i want to configure the UART so as to recieve 4-bit words and transmit 7-bit words.
can somebody please help me out??
im a beginner in verilog and i have only made a few small designs. as a first attempt to start with new designs i was thinking of making a UART. i found a nice looking UART at https://www.opencores.com/projects.cgi/web/sasc/overview
the author says that the UART transmit and recieve FIFO can be adjusted. can somebody tell me how can it be adjusted. acutally i want to configure the UART so as to recieve 4-bit words and transmit 7-bit words.
can somebody please help me out??