Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] How to configure the Cadence IUS environment

Status
Not open for further replies.

prcken

Advanced Member level 1
Advanced Member level 1
Joined
Nov 1, 2006
Messages
419
Helped
41
Reputation
82
Reaction score
38
Trophy points
1,308
Location
Shanghai
Activity points
4,059
Hi,
I am trying to run AMS simulation with spectreverilog simulator.
I tried to write a verlig code, but it couldn't generate symbol when i save it, it pops out a window saying as below
Capture.PNG

I added the following in the .bashrc, but it didn't solve the problem

export IUS_INST_DIR=/usr/local/Cadence/IUS82
export PATH=3D"$IUS_INST_DIR/tools/bin:$PATH"
export PATH=3D"$IUS_INST_DIR/tools/dfII/bin:$PATH"
export PATH=3D"$IUS_INST_DIR/tools/simvision/bin:$PATH"
export PATH=3D"$IUS_INST_DIR/tools/inca/bin:$PATH"

any idea?

Happy New Year!

I solved. i copied the above code from internet, but there should have no 3D
 
Last edited:

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top