How to config a tristate port in XC95144 ?

[adscrz]

user tri state port fpga

hi, How to config a tristate port in XC95144 ?
I connect MCU(8051) P0 to XC95144, but the XC95144 always
pull up or pull down the P0 port. So I want to config a tristate port .
I do it like :
...
output [7:0] MCU_P0;
...
...
assign MCU_P0 = 8'hZZ ;
...

the ISE message is:
Found 8-bit tristate buffer for signal <MCU_P0>.
...
Summary:
...
inferred 8 Tristate(s).
Unit <Flash> synthesized

But it still not work. The MCU P0 port still been pull up or pull down.
Why ?

THX.

 

[davorin]

xc95144

Ehhm..what is the intention of your circuit? Not very clear from your Verilog snippet...

8051 drives CPLD or CPLD should drive 8051 or true bidirectional port?
And why you want to have the CPLD port floating?

 

[adscrz]

The circuit is used to capture picture. I just want to test the Flash(K9F2808U0B), The flash data port is connect to the 8051 P0 port, so I want the XC95144 DO NOT disturb 8051's P0 port.

addtional, when I erase the XC95144's program, the P0 port can work correctly. but I need some pin to control Flash in XC95144.
...
puzzle over, waiting your help...

 

[davorin]

I guess it is best to show some schematics here? Avoiding errors in different english dialect (o;

I assume you want to control CPLD port to go to "Z" when driving a pin on it?

Something like:

assign output[7:0] = CONTROL ? DATA[7:0] : 8'bZZZZZZZZ;

Which assigns internal "DATA" to "output" when CONTROL=1...otherwise it is high impedance.