How to come up with the DRC rule for a new technology?

[ajitr99]

Hi all,
I would like to know the key concerns while desiding different DRC rules for a new
process technology (CMOS) such as spacing between different layers, gate length,
gate oxide thicknes etc. Please help me out with your comments or with a good book/
documentation.

Thanks,
Ajith.

 

[limingchou]

u can get these from the foundry. and they can provide these document and *.rul in detail.

 

[sean3]

You have to get the design rule document from the foundry, and then take a old DRC tf for your information.

 

[ajitr99]

I know it very much that they are coming from the foundary

 

[sathi.ec]

All the above three are correct For a new technology.

 

[alok_ky]

these are the constaints depending upon the accuracy and precision of the instruments and the technology used in the fab. If these are not met, then the the given design cannot be faricated in the given fab, for a give technology.

Hope this helps

 

[Syukri]

try tp go to
www.mosis.org
for the parameters.

Added after 1 minutes:

try tp go to
www.mosis.org
for the parameters.

 

[zenisle]

asking foundry for drc rule is common method.