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Oversampling does not apply to PLLs instead of A/D and D/A. There is only a factor between the loop bandwidth and the comparison frequency. This ratio is between 10 and some 1000.
hi,
rfdesign i feel u r right to certain extent,but what about fsk modulation using sigma delta fractional n freq synthesizer here we can apply the concept of oversampling.
as u said it may not be applicable when we r feeding a constant dc signal
if you r saying about frequency modulated signal, it should be similiar to ADC.
first you should have base band signal (frequency changing with time) and the bandwidth for the baseband signal.
so the OSR is determined by signal to distortion ratio, the strucure of the sigma delta, and the baseband bandwith. even in ADC, for optimum performace, the OSR is also need to be optimized based on those .
it really needs simulation based on behaviral models to decide the OSR, the loop can be just simplified as a low pass filter following the sigma delta modulaor.
another thing is for Fractional-N, usually the crystal reference is used as the clock for the sigma delta modulator.
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