Your 1u/1u transistor is one square but to this you have to
add the gate contact tab geometry and gate contact
resistance terms. You should draw out the layout and pick
off the L and W, squares = L/W.
Now within the FET the resistance is distributed and so
is the Cdg/Cgs. Your L is from one point to another, and
picking the right ones is key. I would (always have) take
the channel center as one point and the inner edge of
the gate poly contact as the other.
RF FETs often are contacted at both sides so you'd do
that and then figure the parallel resistance-to-center.