hellow sir,
If i'm not wrong the formula for Tclk is
Tclk≥Tskew+Tpd+Tsetup. ---- Tpd is propagation delay of combi logic
I have never seen Tdata term included in cal of Tclk.
again there is skew present in clk. then it should be considered for Tclk cal.
Thinking you,
here there is no combinational logic but a D flip flop and the propagation delay of data to the Q has been given by Tdata_q so only i have used Tdata_q instead of Tpd,,,,
the skew of the clock is accounted for using Tskew,,,,