Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
At "advanced nodes" you cannot assume a pure SiO2 dielectric, high-K (HfO2) and partially nitrided gate dielectrics are in play.
SiO2 Er is 3.9. Other options would need you to do some research beyond simple begging, stoichiometry and layering and growth details matter. So too does the difference between electrical and optical Tox.
You will have to go through the PDK documentation provided by the fab house.
Usually as it is under an NDA you will have to go through the text files of MOSFET spice models to find the values of corresponding parameters.
Just curious, why do you need to know the cox? To formulate some sort of equation for hand calculations? Remember that they are not very correct. Use them to get a feeling for which handles to pull in order to say increase gain or bandwidth.
And, in order to find parameters such as these, what about running a simulation instead and characterize the device that you need for your application? That enables you to also find the capacitance vs gate voltage, current, etc.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
