How to caculate the efficiency of DCDC converter

[fantaci]

I consider the resisitor effect of coil, ESR, on resistor of swith, but my result is wrong, especially in low load condition. I think because of the resistor, the coil current behaves like an exponential way instead of linear way. Then I integrated the coil current and average the result to get the current from vin.
Using eff=(Vout*Iload)/(Vin*Iin). In heavy load condition, the result meets my estimation very well, but in light load condition, the test results is much worse than what I estimated. So I am wondering where does this extra power go?
So what`s wrong, is there any good way to calculate the efficiency?

 

[IanP]

DC-to-DC conversion is a non-linear process. The best efficiency you will always have at (roughly) 80%-100% load.
You ask where the energy goes? Heat, my friend. Heat that is lost in transformer cores, switching transistors etc. etc.
I don't know of any simple method of caluclating efficencies; the best you can do is to calculate it at theoretical level and just measure it at, say, 25%, 50%, 75% and 100% load and publish the true results ..
Regards,
IanP

 

[moda]

Hello fantaci,

You did good calculation, in heavy load, the charge loss of your fet in negligible, but in light load you need to calculate the charge loss of your fet.

for example:
The Si4463 PFET with 67 nano-coulombs at 9Volts will dissipate in its gate drive 600mW at 1MHz !!!

Regards

Moda

 

[batdin]

I often use Pspice for that purpose.The only thing I don't account for is the core loss (but I suppose you can include it,too), which can be calculated using the core's datasheet.

 

[Y.C Park]

Hi All !!!

I think DC/DC efficiency calculation is a little bit difficult.
My calculation is that
Loss1=DC/DC chip power consumption (normally ~10mW, if coms DC/DC converter & 3V operation)
Loss2= MOSFET Conduction loss
Loss3= MOSFET swithcing loss
Loss4= etc ( Inductor ESR & chip metal & Bonding,schottkydiode loss ....)

Estimation
Loss1 is estimated by simulation.
Loss2 is also estimated by simulation that {Iload * (Vout/Vin)}*Vds*Ontime
(Vout/Vin = Convertion ration , Vds= Drain to source Voltage when MOSFET turn on, On time is determined by convertion ratio)

Loss3 is also estimated by simulation that
Qg*Vgs*Fop
Qg= Gate charge per one period (you can get its value integrated current into or out from/to Gate of MOSFET)
Vg= Gate to Source Voltage (Noramally Vout)
Fop= Operation Frequency
Loss4 is roughly estimated by information

Efficiency(%) = Vout*Iout/(Vout*Iout + All loss) * 100

Thanks

 

[fantaci]

Hi, All
could anybody provide me a good simulation method for efficiency. I could not simulate the full circuit just for efficiency, it is too time-consuming.
Back to calculation, I do not care about the power consuming for the swithing of gate of power transistor, which belongs to the core circuit power consuming and has no dependence with load current and input voltage level. I think besides the power lost on the resistor of swith and parasitic resistor, the charge and discharge of the drain capacitor and diode capacitor also contribute some power consume. And, I am not sure about the effect of rise time and fall time of clock.

I drawed a simple boost DCDC modulator as an example. the Vurneg is 4v, and the Vout is 12v. I think when the switch on, curent of coil increased. then switch off, firstly, in order the chage the positive node voltage of diode to 12+0.7V, the three capacitor has to be charged. This need some energy. But I am wondering, after the coil current reach zero, the energy stored in the parasitic capacitor go back to Vunreg until the drain voltage reach to Vunreg. And after that, switch on, and the capacitor is dischared to ground ,this dischared charge is really the lost of power.

Am I right?

 

[VVV]

Yes, you are correct. The power lost in Coss is the energy stored in it before discharge, multiplied by the switching frequency.

Do not foget the diode losses when you calculate the eficiency. They are significant.

The low efficieny at light load is normal. As load power decreases, all other losses (quiescent current, gate drive loss, etc.) become a greater and greater portion of the total power. So if you need to output 50mW and the total losses are 50mW, then your efficiency is 50%. And at zero output power, the efficiency is simply zero.

 

[fantaci]

Yes, you are correct. The power lost in Coss is the energy stored in it before discharge, multiplied by the switching frequency.

But how about the current go back from the charged capacitors to Vunreg? I think this part of energy is not lost.

 

[moda]

Use the pspice SW and the right fet/diode model.

I did it, and its very accurate!

Regards

Moda