How to avoid simulation error while using ripple component ?

[Rachel]

synthesis problem

DC insert a component named "ripple" which act as a wire, and the net name different at the different side of the ripple which leads to simulation error. Example :

ripple
n101 --------[]--------- A[0]

How to avoid this case ?

 

[chiente]

Re: synthesis problem

U might need to check naming rule before writing out netlist.