How to avoid high frequency noise

[alex051]

Hi,

I am trying to build a grid connected inverter. And the inverter works at lower dc voltage input levels. I want to increase the voltage up 100V but when I increase the voltage above 20V the gate signals begin to be distorted and the MOSFETs are not switched when they are supposed to.

I think the reason may be because of noise interference from the high frequency switching. I used optocouplers for the gate drives to avoid this but the problem is still there.

I would appreciate it if any one has suggestions.

Thanks

 

[JStuffer]

Optocouplers won't help because there's still rf-exposed gate signal path and you replaced only about 1/2" of this trace (or however long an optocoupler is).
You will need to make changes to the layout. Try to separate signal ground-loop from power ground-loop, add shieldings etc.

 

[dick_freebird]

Gate charge to switch the FET depends a lot on the drain
voltage (Miller charge, Cgd()*Vds(off), and a driver that can
swing the gate in (say) 100nS at 20V might need 500nS
at 100V Vds - possibly giving enough time in the FET's linear
amplifier region to start up a nice LC oscillation and maybe
get stuck.

If you put a 'scope to it I bet you could figure out some
things about the "noise" source and whether you are respecting
the FETs' gate drive requirements for sensible operation.

 

[alex051]

I added snubbers to the MOSFET and it is much better now. It is not still working at full power but it will do for now.

Another problem I am having is my inverter works as a stand alone with resistive load but when I connect it to the grid it is not giving output current. when i connected to the inverter to the grid the output current is just high frequency oscillations.

So is there any thing i have to consider when connecting to the grid. What I did was just connect the output terminals where the resistor was connected directly to the grid outlet.

The inverter is buck-boost inverter and is designed to work as grid connected and works in simulations.

 

[hakeen]

Hi

I believe Miller coupling can be a potential problem. But in this case I would expect to see wrongly turning on of MOSFETs, too. I mean voltage rise on gate of MOSFET should activate normally turned of MOSFETs.

A simple test is to connect some cap across Gate and Source. That will incerase timings but good for some checking. Is it getting better?

You can check this paper for some information about miller coupling and possible preventions




Regarding your question to grid, I would be careful. Normal 110V/230V outlets can have very low impedances (even sometimes <1Ohm) and very high inductances. You should arrange your driver and coupling circuitry.

Cheers

 

[FvM]

Considering the strange gate driver circuits I have already seen at edaboard, it doesn't make much sense to discuss the present
problem without knowing about the actual driver design.

So is there any thing i have to consider when connecting to the grid.

The inverter voltage has to follow the grid voltage, the current should have a sine waveform in phase with the grid voltage (not
generate reactant power). How do you achieve this in your design?