Scan Insertion
uncontrollable clocks are those which come out frm a combo logic ( dividers ..etc)
when doin DFT, all the controls of the FF must be wrt to the TEST EN signal,
in the sense once if TEST EN =1, then automatically the entire ship should be in scan mode .... for this all the clock of the FF should be controllable externally ( at pin level)
werver u get a "uncontrollable clk" or , pls do the following
1) MUX the functional CLK with the "test clk" with the TEST EN as the select line and then givethe o/p of mux as the input to the FF ( so that wen TEST EN =1, the test clk will be given to all the FF and wen TEST EN=0, the chip functions with normal clock )
pls lemme kno, if u hv ne concerns
WBR
Lakshman